This invention relates to methods of replacing at least a portion of a semiconductor substrate deposition chamber liner, to methods of depositing materials over a plurality of semiconductor substrates, and to liners for semiconductor substrate deposition processing chambers.
Semiconductor processing in the fabrication of integrated circuitry typically includes the deposition of layers on semiconductor substrates. Exemplary processes include physical vapor deposition (PVD), and chemical vapor deposition (CVD) including atomic layer deposition (ALD). With typical ALD, successive mono-atomic layers are adsorbed to a substrate and/or reacted with the outer layer on the substrate, typically by successive feeding of different precursors to the substrate surface.
Chemical and physical vapor depositions can be conducted within chambers or reactors which retain a single substrate upon a wafer holder or susceptor. The chambers include internal walls which can undesirably have deposition product deposited thereupon in addition to the substrate. This is particularly problematic in ALD and other CVD processes, yet can also occur PVD chambers. One existing method of protecting or preserving the internal chamber wall is to shield such from the deposition material with one or more removable liners. These liners might be received immediately adjacent or against the internal chamber walls. Alternately, the liners might be displaced therefrom, thereby defining an appreciably reduced volume chamber within which the substrate is received for deposition. One advantage of using liners is that they can be periodically replaced with new or cleaned liners, thereby extending the life of the deposition chambers. Further and regardless, the spent liners can typically be removed and replaced much more quickly than the time it would take to clean the internal chamber walls at a given cleaning interval.
The present method for replacing the liners includes partial disassembly of the deposition chamber. Specifically, the lid is typically removed to provide access to the liners for their quick removal and replacement with fresh liners. The deposition processor is then reassembled for use. The spent liners can thereby be discarded or cleaned for re-use without adding to the downtime for the processor for the same. Such methods do however expose the entire deposition processor apparatus to clean room ambient conditions, thereby increasing downtime, thermal cycling and pressure cycling of the apparatus. It would be desirable to develop methods and structures that can be used to minimize or eliminate such downtime and temperature and pressure cycling.
The invention was motivated in overcoming the above-described drawbacks, although it is in no way so limited. The invention is only limited by the accompanying claims as literally worded without interpretative or other limiting reference to the specification or drawings, and in accordance with the doctrine of equivalents.
The invention includes methods of replacing at least a portion of a semiconductor substrate deposition chamber liner, methods of depositing materials over a plurality of semiconductor substrates, and semiconductor substrate deposition processor chamber liner apparatus. In one implementation, a method of replacing at least a portion of a semiconductor substrate deposition chamber liner includes removing at least a piece of a deposition chamber liner from a deposition chamber by passing it through a passageway to the deposition chamber through which semiconductor substrates pass into and out of the chamber for deposition processing. A replacement for the removed deposition chamber liner piece is provided into the chamber by passing the replacement through said passageway through which semiconductor substrates pass into and out of the chamber for deposition processing.
In one implementation, a semiconductor substrate deposition processor chamber liner apparatus includes a plurality of pieces which when assembled within a selected semiconductor substrate deposition processor chamber are configured to restrict at least a majority portion of all internal wall surfaces which define said semiconductor substrate deposition processor chamber from exposure to deposition material within the chamber. At least some of the pieces are sized for passing completely through a substrate passageway to the chamber through which semiconductor substrates pass into and out of the chamber for deposition processing.